The invention relates generally to semiconductor devices and integrated circuit fabrication and, in particular, to chip structures having wiring coupled with the device structures of a high frequency switch and methods for fabricating such chip structures.
Mobile communication devices (e.g., laptops, cellular phones, tablets, etc.) may utilize BiCMOS circuitry to handle wireless high frequency signals transmitted to the mobile communication devices and received by the mobile communication devices. The BiCMOS circuitry may include one or more switches used to selectively route high frequency signals, which are typically in the radiofrequency (RF) band, received by an antenna from a low noise amplifier to other chip circuitry and to selectively route high frequency signals from a power amplifier to the antenna. These high frequency switches may include a stack or bank of field effect transistors that are formed by complementary metal-oxide semiconductor (CMOS) processes. Switches may be characterized by various figures of merit (FOM), such as the on-resistance (Ron), the off-capacitance (Coff), and their multiplicative product.
A back-end-of-line (BEOL) interconnect structure may be used to route these high frequency signals to and from the active devices of the switch. The BEOL interconnect structure may include wiring embedded in a stack of dielectric layers to create a stack of metallization levels defining an interconnection network for the signals. The BEOL interconnect structure may be fabricated using damascene processes in which the different metallization levels in the stack are individually formed.
Chip structures having wiring coupled with a high frequency switch and methods for fabricating such chip structures are needed in order to improve one or more FOMs.